Imperas Announces Licensing, Distribution Relationship with Tensilica

Tensilica Move Adds to Growing Open Virtual Platform Momentum
THAME, U.K.--(Business Wire)--
Tensilica(R) Inc. has signed a partnership agreement with Imperas
to allow fast functional, instruction accurate models of its popular
Xtensa(R) and Diamond Standard processors to run on Open Virtual
Platform (OVP)-based virtual platforms.

Specifically, wrapper files enabling integration of the Tensilica
processor models are now available for free download from the
OVPworld.org website and expand OVP's library of free downloadable
components. These models will run with Tensilica's TurboXim(TM) fast
functional simulator, which simulates at speeds 40 to 80 times faster
than a traditional instruction set simulator.

Imperas's OVP wrappers for Tensilica cores use the built-in
application programming interface (API) in the Tensilica simulation
model for communication between the Tensilica processor model and the
OVP platform. While models of Tensilica's Xtensa configurable
processor are automatically generated to match the exact
configuration, models of Diamond Standard Series processors are
available as part of a free 15-day software development kit evaluation
download at www.tensilica.com.

"Our agreement with OVP and Imperas will help expand the market,"
affirms Chris Jones, Tensilica's director of strategic alliances.
"Broadening the choices of ESL tools that our customers can use
enables those designers to make better SoC architectural choices
earlier in the design process. Open source, non-proprietary tools,
such as those available from OVP, become important components for the
growth of multicore design."

The wrapper file is available now and downloadable free of charge
at the OVP website: www.OVPworld.org.

Imperas Ltd. launched the OVP initiative in March 2008 with
support from end users, intellectual property (IP) developers, service
providers and tool suppliers. "Since the launch of OVP, more than 250
people have registered on the OVP discussion forum, and over 100
unique companies and institutions have downloaded nearly 1,000 OVP
files," says Simon Davidmann, Imperas' chief executive officer. "This
is an unprecedented launch in this industry, and this partnership with
Tensilica is a significant addition to the OVP momentum."

Other components available from OVP include APIs for building a
platform verification infrastructure and developing behavioral and
processor models. Model libraries of processors, behavioral components
and peripherals are offered, along with platform templates, and
OVPsim, a reference simulator shipped as an executable.

Imperas will be in booth #467 during the 45 Design Automation
Conference (DAC) June 9-12 at the Anaheim Convention Center in
Anaheim, Calif.

Open Virtual Platforms

The goal of OVP is to provide the infrastructure technology --
open source and free, focused on multicore and speed -- for embedded
software development, and the infrastructure through the OVPworld.org
website for this community to grow. The technology helps to address
problems embedded software developers have when modeling the system on
chip (SoC) that hosts their software.

The OVP website (www.OVPworld.org) serves as the portal, with
details about the technology, a discussion forum for the community,
and links to download each component.

About Imperas

Imperas is focused on delivering technology in the Electronic
Design Automation (EDA) space. By blending hardware and software
technologies and design processes together, Imperas provides
methodologies, technologies and products to enable the efficient
programming, debug, and verification of Multiprocessor Systems-on-Chip
(MPSoCs). With an engineering base in the UK, Imperas distributes its
products to customers worldwide. For more information, visit:
www.imperas.com.

About OVP

Open Virtual Platforms (OVP) was initiated with the donation by
Imperas of approximately $4 million of simulation infrastructure that
enables chip designers and software developers to model platforms,
systems on chips (SoCs), and multiprocessor SoCs (MPSoCs). The OVP
technology is available for free from www.OVPworld.org and has the
support of electronic design automation (EDA) companies, end users and
intellectual property (IP) providers. For more details, visit:
www.OVPworld.org.

About Tensilica

Tensilica offers the broadest line of controller, CPU and
specialty audio and video DSP processors on the market today, in both
an off-the-shelf format via the Diamond Standard Series cores and with
full designer configurability with the Xtensa processor family.
Tensilica's low-power, benchmark-proven processors have been designed
into high-volume products at industry leaders in the digital consumer,
networking and telecommunications markets. All Tensilica processor
cores are complete with a matching software development tool
environment, portfolio of system simulation models, and hardware
implementation tool support. For more information on Tensilica's
patented approach to the creation of application-specific building
blocks for SOC design, visit www.tensilica.com.

Imperas acknowledges trademarks or registered trademarks of other
organizations for their respective products and services.

Imperas
Larry Lapides, 925-519-1234
Vice President of Sales
larryl@imperas.com
or
Public Relations for Imperas
Nanette Collins, 617-437-1822
nanette@nvc.com

Copyright Business Wire 2008