Cadence and Xilinx Simplify SoC Development With Enterprise Verification Capabilities for FPGA Targeted Design

* Reuters is not responsible for the content in this press release.

Wed Jun 24, 2009 8:00am EDT

  SAN JOSE, CA, Jun 24 (MARKET WIRE) -- 
Cadence Design Systems, Inc. (NASDAQ: CDNS), the leader in global
electronic design innovation, today announced that it has teamed with
Xilinx to enable delivery of encrypted simulation models of Xilinx
intellectual property (IP) in the latest 11.2 release of the Xilinx ISE
Design Suite. The result is an expanded library of design IP and
complementary simulation models supported by the Cadence(R) Incisive(R)
functional verification platform for the new Xilinx Base Targeted Design
Platform. Used in conjunction with the Open Verification Methodology
(OVM) to provide multi-language verification and reuse, this approach can
help mutual customers reduce risk and boost schedule predictability and
quality.

    Xilinx Targeted Design Platforms enable embedded, digital signal
processing (DSP) and hardware designers alike to develop FPGA-based
systems on chip (SoCs) faster with access to a wide array of silicon
devices supported by open standards, common design flows, reusable IP,
development tools, and run-time platforms. Using the high-performance
IEEE-standard encryption donated by Cadence, Xilinx is now able to
deliver Xilinx SecureIP models to speed development of designs targeting
its latest Virtex(R)-6 FPGAs and Spartan(R)-6 FPGAs.

    "Our customers have been building larger and more complex FPGA-based SoCs,
which require more advanced verification techniques," said Tom Feist,
senior marketing director for ISE Design Suite at Xilinx. "Working closely
with Cadence, we are able to deploy our SecureIP models using the new IEEE
encryption with users gaining 2X performance improvements in simulation.
When used in conjunction with the OVM, this enables greater verification
efficiency throughout the FPGA development ecosystem."

    "Advances in technology announced by Xilinx and Cadence can translate into
real time-to-market and quality boosts for our mutual customers," said
Michal Siwinski, marketing group director of Enterprise Verification at
Cadence. "Xilinx Targeted Design Platforms enable rapid creation of SoCs
that scale to the sweet spot for both the OVM and the Cadence Incisive
functional verification, helping customers to reduce overall project costs
and risks."

    About Cadence

    Cadence enables global electronic design innovation and plays an essential
role in the creation of today's integrated circuits and electronics.
Customers use Cadence software and hardware, methodologies, and services
to design and verify advanced semiconductors, consumer electronics,
networking and telecommunications equipment, and computer systems. The
company is headquartered in San Jose, Calif., with sales offices, design
centers, and research facilities around the world to serve the global
electronics industry. More information about the company, its products,
and services is available at www.cadence.com.

    Cadence, Incisive and the Cadence logo are registered trademarks of
Cadence Design Systems, Inc. in the United States and other countries.
All other trademarks are the property of their respective owners.

    

For more information, please contact:
Dean Solov
Cadence Design Systems, Inc.
408-944-7226
dsolov@cadence.com

Copyright 2009, Market Wire, All rights reserved.

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