Synfora Acquires Esterel Studio, Adds Control-Intensive IP Development Capabilities to Product Portfolio

Complementary and Integrated Flow Already in Use by Top Tier Customers
MOUNTAIN VIEW, Calif.--(Business Wire)--
Synfora, Inc., the premier provider of algorithmic synthesis tools for
integrated circuit and system designers of large, complex processing
applications, today announced that it has purchased Esterel Studio, a tool suite
developed by Esterel EDA Technologies. Esterel Studio is based on the Esterel
synchronous programming language in use for the design of control logic and bus
systems by three of the top 10 semiconductor companies in system-on-chip (SoC)
designs.

"Esterel Studio is complementary to the PICO algorithmic synthesis platform and
was already part of an integrated flow used by several of our customers," said
Synfora CTO Vinod Kathail. "This step is a part of our long-term vision of
providing integrated solutions for application accelerators and more
control-oriented IP."

Esterel Studio is primarily used to design control-intensive silicon
intellectual property (IP) blocks and complex reactive systems such as control
circuits, embedded systems, human-machine interface and communication protocols.
Companies such as STMicroelectronics, Texas Instruments, NXP and Intel have used
the Esterel programming language for more than 50 production designs.

Esterel Studio supports a complete flow from design to verification and supports
textual or graphical design of large state machines with arbitrary embedded data
path, animated simulation and debugging. Esterel studio is able to generate
either HDL (Verilog, VHDL) code or C / SystemC models from the same source code,
which ensures that the models used in virtual platforms for software validation
agree with the final hardware design. Esterel Studio also supports formal
verification of the produced results, a critical capability for complex
control-oriented designs. In conjunction with the PICO platform, this will
provide Synfora customers with an integrated design environment for the
development of both control-intensive and algorithmic-intensive blocks.

About the Synfora PICO Platform

The PICO Algorithmic Synthesis Platform provides productivity gains by creating
application accelerators from an untimed C algorithm at the highest level of
abstraction. PICO yields quality of results (QoR) that is competitive with
manual design by using a unique parallelizing compiler and multi-level
hierarchical abstraction and IP reuse. It offers the highest possible level of
abstraction for large designs and has been proven to provide huge productivity
gains on the largest production designs, not just on small blocks.

About Synfora

Synfora, Inc. is the premier provider of algorithmic synthesis tools used to
design complex systems-on-chips (SoCs) and FPGAs. Synfora's PICO algorithmic
synthesis platform offers designers of large, complex subsystems productivity
gains at the highest-level design abstraction and delivers high QoR. Synfora
serves customers worldwide in the audio, video, imaging, wireless, and security
segments of the integrated circuit (IC) design market. The company's investors
are ATA Ventures, Foundation Capital, U.S. Venture Partners, Wafra, and Xilinx.
For the latest information on Synfora, please visit http://www.synfora.com.

Cayenne Communication LLC for Synfora
Michelle Clancy, 252-940-0981
michelle.clancy@cayennecom.com

Copyright Business Wire 2009