Lattice Announces First PCI Express 2.0 Compliant Low Cost FPGA

HILLSBORO, OR, Jul 05 (MARKET WIRE) --
Lattice Semiconductor (NASDAQ: LSCC) today announced that its
LatticeECP3(TM) FPGA family is compliant with the PCI Express 2.0
specification at 2.5Gbps. The LatticeECP3 FPGA and its PCI Express (PCIe)
IP core passed PCI-SIG PCIe v2.0 compliance and interoperability testing
for 1- and 4-lane configurations at a recent PCI-SIG workshop, ensuring
that Lattice's solution is interoperable with existing PCIe 2.0 supported
systems. Achieving this significant industry milestone enables cost and
power reduction with higher reliability for 2.5Gbps PCIe v2.0 systems for
communications, multimedia, server and mobile platforms, and adds to the
broad range of design solutions from Lattice and its IP partners that
support the widely adopted serial interconnect standard.

The PCIe v2.0 specification allows operation at a lower speed (2.5Gbps),
but the loop bandwidth characteristics are different and more rigorous
than for PCIe v1.1. The Lattice solution allows customers who do not need
the PCIe link to operate at 5Gbps, but who care about PCIe v2.0
compliance, to use a low cost FPGA in PCIe v2.0 compliant systems.

In addition, Lattice has worked with Trellisys Ltd to provide a robust
and cost-effective PCIe Bus Functional Model (BFM) for Lattice's PCI
Express x1 and x4 IP Cores. While there are a number of third party
verification cores available for PCI Express, these are typically
targeted at ASICs/custom logic and the cost of the verification IP often
becomes prohibitive in the FPGA development flow. The Trellisys PCIe BFM
concentrates on the transaction layer, since typically that is where the
user application logic is implemented. This approach assumes that
physical and data link layers, which are completely encapsulated in the
Lattice PCIe IP cores, have already been verified by Lattice.

"The Trellisys PCI Express BFM brings the verification investment back in
line with the FPGA development flow while still maintaining an effective
verification concept," said Charles Gardiner, Director, Trellisys. "Since
PCI Express 2.0 has more rigorous testing requirements compared to PCI
Express 1.1, successfully testing against the PCI Express 2.0
specification provides more robust operation with other PCI Express 2.0
compliant devices."

The Trellisys PCIe BFM supports both Verilog and VHDL and has been
verified on both the Aldec Active-HDL and Riviera-PRO simulators. It is
delivered as precompiled code but provides the user with a powerful
procedural library on which an advanced verification suite can be based.
Designers can immediately begin the evaluation and design of PCI Express
2.0 compliant systems in LatticeECP3 FPGAs using the IPexpress(TM) tool
within the Lattice Diamond(R) 1.2, or later, design tool suite. The
IPexpress tool provides the PCIe core, reference designs and all the
scripts, BFM and simulation models needed to streamline integration into
customer designs.

"Our relationship with Trellisys complements our own skills and reaffirms
our ongoing commitment to the LatticeECP3 PCI Express IP portfolio," said
Shakeel Peera, Lattice Director of Marketing for Silicon and Solutions.
"This collaboration provides validation IP that will enable users to
reduce design complexity and shrink the time to market window for their
PCI Express designs."

About the Lattice IP Suites
Lattice IP Suites are a family of
interoperable LatticeCORE(TM) IP cores optimized for Lattice device
architectures that enable various technology-specific applications. The
IPexpress tool within the Lattice Diamond design environment allows
customers to seamlessly access the latest IP cores from the Lattice IP
server and configure them. All Lattice IP cores can be fully evaluated
prior to purchase: in the free evaluation mode, customers can fully
configure an IP core, integrate it into their designs, perform full
verification and even run it in hardware for a limited time. Purchase of
an annual node-locked IP Suite license enables the member IP core to
operate in hardware for an unlimited time. The node-locked license can be
used on multiple designs or projects over a one year period. For more
information about how Lattice IP Suites can bring value to design
projects, please visit: www.latticesemi.com/IPSuites.

Pricing and Availability
The Lattice PCI Express IP Suite is currently
priced at $99 as part of a separate promotion. The regular list price of
the IP Suite will be $995 after the limited promotion. The IP Suite is
available for immediate ordering through authorized Lattice distributors
listed at www.latticesemi.com/sales.

About the Lattice ECP3 FPGA Family
The LatticeECP3 FPGA family is
comprised of the lowest power, SERDES-enabled FPGAs in the market today.
The family's five FPGAs offer standards-compliant, multi-protocol 3.2G
SERDES, DDR1/2/3 memory interfaces and high performance, cascadable DSP
slices that are ideal for RF, baseband and image signal processing.
Toggling at 1Gbps, the LatticeECP3 FPGAs also feature fast LVDS I/O as
well as embedded memory of up to 6.8 Mbits. Logic density varies from 17K
LUTs to 149K LUTs with up to 586 user I/O. The LatticeECP3 FPGA family is
ideally suited for deployment in high volume cost- and power-sensitive
video camera and display, wireline and wireless infrastructure
applications.

About Lattice Semiconductor
Lattice is the source for innovative FPGA,
PLD, programmable Power Management and Clock Management solutions. For
more information, visit www.latticesemi.com.
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Lattice Semiconductor Corporation, Lattice (& design), L (& design),
LatticeECP3, IPexpress, LatticeCORE, Lattice Diamond and specific product
designations are either registered trademarks or trademarks of Lattice
Semiconductor Corporation or its subsidiaries in the United States and/or
other countries.

GENERAL NOTICE: Other product names used in this publication are for
identification purposes only and may be trademarks of their respective
holders.

EDITORIAL/READER CONTACT:
Brian Kiernan
Corporate Communications Manager
Lattice Semiconductor Corporation
503-268-8739 voice
503-268-8688 fax
brian.kiernan@latticesemi.com

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