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Aldec Delivers $1,995 Mixed Language Simulator to FPGA Market

Mon Jul 13, 2009 9:05am EDT
HENDERSON, Nev.--(Business Wire)--
Aldec, Inc., a leader in RTL simulation and Electronic Design Automation (EDA),
unveils a new low-cost mixed language RTL simulator -- Active-HDL Designer
Edition. The product closes a gap in the mixed RTL FPGA simulation market.
Today, FPGA designers can purchase a high performance mixed language RTL
simulator from Aldec or other commercial EDA vendors starting at $6,000 or
alternatively purchase a restricted, single language, FPGA vendor supplied
simulator for $1,000 or less. A price, feature and performance gap exists
between the commercial EDA simulators and the FPGA vendor simulators. Active-HDL
Designer Edition fills this market gap and provides FPGA designers with a mixed
language simulator for less than $2,000. The product includes: industry proven
IEEE mixed-language simulation support for VHDL, Verilog and SystemVerilog
(Design), 2X-plus performance gains over FPGA vendor supplied RTL simulators,
encrypted IP support and no performance limitations on FPGA design size. 

EDA Tool Vendor Advantages

By purchasing Active-HDL Designer Edition, FPGA designers receive technical
support directly from the EDA manufacturer. Additionally, software revisions and
library maintenance are the same across all configurations of Active-HDL
providing a smooth upgrade path if additional functionality is required.
Capabilities such as code coverage, design rule checking, DSP modeling and
verification, SystemC co-simulation, transaction level modeling or assertion
based verification are available. 

Availability

Active-HDL Designer Edition is available today and supports Windows 32/XP/Vista
operating systems. The product is offered as a one year time based license and
available as either a node locked ($1,995) or floating ($2,495) license. To
learn more about Active-HDL Designer Edition go to:
http://www.aldec.com/DesignerEdition or attend our online webcast July 16, 2009,
"A Look Under the Hood - $1,995 Mixed-Language FPGA Simulation." 

Register for the webcast at http://www.aldec.com/events

About Aldec

Aldec Corporation is an industry-leader in Electronic Design Verification and
offers a patented technology suite including: RTL Design, HDL Simulators,
Hardware-Assisted Verification, Design Rule Checking software, co-simulation,
co-verification, IP Cores, DO-254 Functional Verification and Military/Aerospace
solutions. Aldec is a privately held company with continuous revenue growth, and
employs approximately 200 people worldwide. Corporate Website: www.aldec.com

Active-HDL and Aldec are trademarks of Aldec Corporation. All other trademarks
or registered trademarks are property of their respective owners. 





Aldec, Inc.
Lori Nguyen
Director of Marketing
702-990-4400, ext. 254
Lorin@aldec.com

Copyright Business Wire 2009



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