IEC Announces 2008 DesignVision Award Finalists and Recognizes Best Design Tools...

IEC Announces 2008 DesignVision Award Finalists and Recognizes Best Design Tools and Products for New Year

CHICAGO--(Business Wire)--The International Engineering Consortium (IEC) today honored the
finalists of the 2008 DesignVision Awards by giving tribute to the
best design tools and products in the semiconductor industry. The
IEC's first official announcement of winners will take place at the
DesignCon 2008 conference and exhibition this February 4-7 at the
Santa Clara Convention Center in Santa Clara, CA.

"It's a pleasure to distinguish these innovators and top products
for the design engineering community," commented IEC President John
Janowiak. "We're grateful to all participants of this year's
DesignVision Awards program for it's design teams and companies like
these that are committed to the successful technology advancement that
drive all industries forward."

Finalists were chosen from a record number of competing products
by a panel of judges selected from the 2008 DesignCon Technical
Program Committee, which contributed to the development of more than
120 sessions making up this year's educational program. This year's
Technical Program Committee consists of 115 of the industry's top
thought leaders.

In each of the eight categories, the 2008 award finalists include
the following companies and products respectively:

ASIC and IC Design Tools

-- Cadence Design Systems, Inc. - Cadence Litho Electrical
Analyzer

-- GiDEL Inc. - PROCStar II

-- Sequence Design - PowerTheater-Explorer

Design Verification Tools

-- EVE - Zebu-XXL

-- Mentor Graphics and Cadence Design Systems, Inc. - Open
Verification Methodology

-- Synplicity, Inc - TotalRecall Full Visibility Technology

Interconnect Technologies and Components

-- Amphenol TCS - XCede

-- Cinch Connectors - Cinch(R) iQ(TM) Hybrid Interconnect

-- Sigrity, Inc. - OptimizePI

Semiconductors and ICs

-- Altera Corporation - Stratix III FPGA

-- Chip Estimate - ChipEstimate.com and IP Concierge

-- Gennum Corporation - 3 Gb/s Optical Module

-- Lattice Semiconductor - LatticeXP2 FPGA Family

Semiconductors and ICs (IP)

-- ARC International - ARC Video Subsystems

-- Rambus - The XDR(TM) Memory Architecture

-- Xilinx, Inc. - Xilinx(R) MOST(R) NIC LogiCORE(TM) IP Solution

Structured/Platform ASIC, FPGA, and PLD Design Tools

-- Altera Corporation - Quartus II v7.1 Software with Enhanced
SOPC Builder

-- Lattice Semiconductor - LatticeXP2 FPGA Family

-- Xilinx - Integrated Software Environment (ISEa,,(cents)) 9.1i

System-Level Design Tools

-- Carbon Design Systems - Carbon Model Studio

-- FuturePlus Systems, Corp. - FS5000 Jitterlyzer

-- Synplicity, Inc. - Synplify DSP ASIC Edition

Test and Measurement Equipment

-- Agilent Technologies - Agilent N6705A DC Power Analyzer

-- ASA Corp. - M1 Oscilloscope Tools v5

-- SyntheSys Research, Inc. - BERTScope Phase Locked Loop
Analyzer

The first official announcement of winners will take place at the
2008 DesignVision Awards Ceremony at DesignCon 2008 on Tuesday,
February 5, 2008, at noon in the theater of the Santa Clara Convention
Center. Entrance to the awards ceremony is complimentary with an
Exhibits Plus Pass available at
www.designcon.com/2008/register/index.asp.

Visit www.designcon.com/2008/ for full information or contact Lisa
Ann Reyes at lreyes@iec.org or +1-312-559-3325.

International Engineering Consortium
Lisa Ann Reyes
+1-312-559-3325

Copyright Business Wire 2008