Profile: MoSys Inc (MOSY.A)
1 May 2019
MoSys, Inc. (MoSys), incorporated on August 1, 2000, together with its subsidiaries, is a fabless semiconductor company focused on the development and sale of integrated circuits (ICs) for the high-speed networking, communications, storage and computing markets. The Company has developed approximately two IC product lines under the Bandwidth Engine and LineSpeed product names. Bandwidth Engine ICs integrate its 1T-SRAM high-density embedded memory with its integrated macro function technology and a serial interface protocol resulting in a monolithic memory IC solution optimized for transaction performance. The LineSpeed IC product line consists of non-memory, high-speed serialization-deserialization (SerDes), input/output (I/O) physical layer (PHY) devices with clock data recovery, gearbox and retimer functionality, which convert lanes of data received on line cards or by optical modules into various configurations and/or ensure signal integrity. These PHY devices reside within optical modules and networking equipment line cards designed for next-generation Ethernet and optical transport network applications. Both product lines are being marketed to networking and telecommunications systems companies. The Company has developed the GigaChip Interface (GCI), which is an open-interface transport protocol optimized for chip-to-chip communications.
The Bandwidth Engine is a memory-dominated IC that has been designed to be a high-performance companion IC to packet processors. While the Bandwidth Engine primarily functions as a memory device, which can accelerate certain processing operations by serving as a co-processor element. Its Bandwidth Engine ICs combine its high-density, high-speed, low latency embedded memory; its high-speed serial interface technology; an open-standard interface protocol, and intelligent access technology. They also can enable system designers to narrow the gap between processor and memory IC performance.
The Company's first generation Bandwidth Engine IC products contain over 576 megabytes (MB), of memory and use a serial I/O with approximately 16 lanes operating at over 10.3 Gigabits per second (Gbps) per lane. Variations of this IC can have over two interface ports, with approximately eight serial receiver and eight serial transmitter lanes per port for a total of over 16 lanes of approximately 10.3 Gbps SerDes interface. These ICs include an Arithmetic logic unit (ALU), which can perform read-modify-write operations. The Company's second generation Bandwidth Engine IC products contain over 576 MB of memory and use serial I/O with over 16 lanes operating at approximately 15 Gbps per lane. The Company has approximately three devices in this product family, such as MSR620 with burst features optimized for oversubscription buffer applications; MSR720 with a write cache and memory coherency capability that allows for deterministic look ups optimized for state and queue type applications, and MSR820 with intelligence for lookup, metering and statistics applications by adding dual counters, atomic and metering functions.
The Company's third generation Bandwidth Engine IC products contain over 1,152 MB of memory and use serial I/O with approximately 16 lanes operating at over 30 Gbps per lane. Bandwidth Engine 3 targets support for packet-processing applications with over five billion memory single word accesses per second, as well as burst mode to enable full duplex buffering up to 400Gbps for ingress, egress and oversubscription applications. The Company has approximately three devices in this product family, such as MSR630, which enables high rate lookup or buffer capabilities; MSR830, which offers additional offload capabilities for functions, such as statistics and metering to manage performance and add features for next-generation networking and communications equipment, and MSRZ30, which builds upon the capabilities and performance of the MSR830, with data rates, interface protocol and data structures that are optimized for the EZchip NPS-400 network processing unit (NPU).
The Company's first generation LineSpeed products consist of single-chip PHY ICs, including a 100G multi-mode gearbox and a 100G quad retimer. These devices are designed to support 10, 40 and 100 Gbps standards for high-density line cards or modules for next generation Ethernet and optical transport network applications. These devices are capable of supporting both short and long reach connections across various specifications. Its second generation of LineSpeed products consists of 100G low power retimer, which is optimized for ultra-low power consumption, integrated test features and small size. It offers third generation of LineSpeed products, the Flex family of 100G PHYs. The Company has approximately four devices in this product family, which include MSH320, a 100Gbps Gearbox with reed-Solomon forward error correction (RS-FEC); MSH225, a 10 Lane Full-Duplex Retimer; MSH322, a 100Gbps Multi-Link Gearbox for Line Cards, and MSH321, a derivative Multi-Link Gearbox.
The Company competes with Micron Technology, Inc., Integrated Silicon Solutions, Inc., Renesas, Samsung Electronics Co., Ltd., Cypress Semiconductor Corporation, GSI Technology, Inc., Broadcom Ltd., Inphi Corporation, M/A-COM Technology Solutions Holdings, Inc. and Semtech Corp.
2309 Bering Dr
SAN JOSE CA 95131-1125